Automatic technology mapping for Quasi Delay-Insensitive (QDI) asynchronous circuits

Anh-Vu Dinh-Duc
Faculty of Computer Science and Engineering, Ho Chi Minh City University of Technology, Vietnam

Thanh Huong Dam Thi
Faculty of Computer Science and Engineering, Ho Chi Minh City University of Technology, Vietnam

Van Hieu Bui
Faculty of Computer Science and Engineering, Ho Chi Minh City University of Technology, Vietnam

Abstract
Asynchronous circuits are different from synchronous circuits. They do not use global clock to synchronize their activities. Almost elements in circuit communicate to each other by a hand-shake protocol. This kind of circuit is a new tendency to research because of their potentialities such as increasing system performance, reducing power consumption, eliminate clock skew, etc. However, asynchronous designs are difficult to implement. The lacks of an optimized design methodology and automatic design tools for asynchronous circuits, especially technology mapping tool, make them not recognized by the semiconductor industry. Technology mapping is a task of transforming a logic design into an interconnection of components that are instances of elements of a given library. It is a difficult task in the asynchronous design flow because hazard-free transform is a hard requirement. This paper is to introduce a solution for technology mapping that can be applied for QDI asynchronous circuits. This algorithm which also takes into account hazards is implemented as an integrated tool in an asynchronous design environment (PAiD). Experiments are needed to justify that the proposed algorithm give a good result for QDI circuits.
Keywords: asynchronous circuits, Quasi Delay-Insensitive (QDI), technology mapping